XPU Vision · Physical AI on the edge

Any open model. Any XPU.

We don’t make models. We port the open models others publish and run them on every kind of processor at the edge: CPU, GPU, NPU and an NVIDIA Jetson edge board. Pick the hardware, turn on your camera, and see what each chip does with the same model, frame by frame. No cloud.

  1. Open modelPublished by its authors, used as is
  2. PortOpenVINO, MLIR with IREE, ONNX and TensorRT
  3. Run on an XPUCPU, GPU, NPU or the Jetson board
  4. MeasureLatency, power, energy and size, live

Checking the machine…

Choose the hardware

Five processors: an NVIDIA Jetson edge board, and beside it our edge machine with a graphics card and three chips inside one Intel processor. The buttons on each are the ways we port a model to that chip.

    Nothing to see yet.

    Turn on the camera, or choose an image or a video. Frames go to the edge machine and are not kept.

    Pick a live model to run it on every frame.

    Ask the robot

    Asks about the current frame. Ask it to point, find, grasp or plan a path, and it marks the picture.

    1. 1

      Hear

      Turns a spoken question into text

    2. 2

      See and reason

      Looks at the frame, answers, points

    3. 3

      Speak

      Says the answer out loud

    The frame it saw

    Ask a question to freeze a frame here.

    Question

    —

    Answer

    —

      The NVIDIA Jetson Orin Nano Super board on our bench: a black fan and heatsink over the module, with power, display, USB and network cables plugged in and its green light on.
      The Jetson Orin Nano Super on our bench, wired to the edge machine. Pick it above and your frames run here.

      The hardware

      Real chips, measured live

      Edge machine
      Intel Core Ultra 7 265: 20 CPU cores, an Intel GPU and an Intel AI Boost NPU in one processor, plus an NVIDIA GeForce RTX 5060 Ti graphics card with 8 GB.
      Edge board
      NVIDIA Jetson Orin Nano Super: a 6-core Arm® Cortex®-A78AE v8.2 64-bit CPU with 1.5 MB L2 + 4 MB L3 cache, and a 1,024-core Ampere GPU with 32 Tensor Cores, sharing 8 GB of LPDDR5 at 102 GB/s, from 7 to 25 W. It sits beside the machine on the local network.
      Toolchains
      PyTorch with CUDA as published; OpenVINO for the Intel GPU, NPU and CPU; IREE, the MLIR compiler, for CUDA, Vulkan and the CPU; ONNX and TensorRT in FP16 on the Jetson.
      Power
      Read from each chip’s own sensor: the graphics card, the Intel processor package, or the Jetson board’s input.

      What we do

      We port, we don’t train

      Every model here is an open model, used as its authors published it. Our work is getting each one onto each processor: converting, compiling and building it for that chip, then checking its answers still match the original before we offer it.

      One model, every XPU

      The same model runs on a graphics card, an integrated GPU, an NPU, CPU cores and an embedded board. Pick a chip and a toolchain above; where a port is not ready for a model, the button says so.

      Measured, not quoted

      Each frame shows where its time went, step by step, the power the chip’s own sensor reads, the energy per frame and the model’s size. The compare chart puts every processor side by side for the picture you are running.

      Live, on every frame

      RT-DETR v2 (R18 or R50) or YOLOS (Tiny or Small) finds 80 kinds of everyday object. Grounding DINO (Tiny or Base) or Google’s OWLv2 finds whatever you name. Depth Anything V2 or Intel’s DPT Hybrid shows how far away everything is. ViTPose or ViTPose+ follows 17 points on each body. Pick the model for each task under the buttons. Objects and depth can also run on the Intel GPU, the NPU or the CPU cores built into the machine’s Intel processor, through OpenVINO, so you can compare their speed and power with the NVIDIA card’s. They can also run on an NVIDIA Jetson Orin Nano beside the machine, a small board built for robots, through TensorRT in FP16; the Jetson measures its own board’s power. The compare chart puts every processor side by side for the model and picture size you are running. Or pick an IREE (MLIR) choice: the model is compiled through MLIR, the compiler framework from the LLVM project, for the Intel CPU, the Intel GPU (Vulkan) or the NVIDIA card (CUDA), and the compiler view shows each stage of the lowering, from PyTorch operations to machine code.

      Asking about a frame

      Qwen3-VL, at 2 B and 4 B parameters, has pointing and boxes built in. Google’s open Gemma 3 4B and Gemma 3n E2B answer too. Gemma 3n is built like Gemini Nano, for devices.

      Why not Gemini Robotics-ER or Nano?

      They are closed. Gemini Robotics-ER runs only in Google’s cloud, and Gemini Nano only inside Chrome or Android. Everything on this page runs on our own machine, so we use open models you can run on yours.